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PD - 95432
Typical Applications
l l l
IRF1503SPbF IRF1503LPBF
HEXFET(R) Power MOSFET
D
14V Automotive Electrical Systems 14V Electronic Power Steering Lead-Free
VDSS = 30V
G S
Benefits
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Advanced Process Technology Ultra Low On-Resistance 175C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax
RDS(on) = 3.3m ID = 75A
Description
Specifically designed for Automotive applications, this Stripe Planar design of HEXFET(R) Power MOSFETs utilizes the lastest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this HEXFET power MOSFET are a 175C junction operating temperature, fast switching speed and improved repetitive avalanche rating. These benefits combine to make this design an extremely efficient and reliable device for use in Automotive applications and a wide variety of other applications.
D2Pak IRF1503S
TO-262 IRF1503L
Absolute Maximum Ratings
Parameter
ID @ TC ID @ TC ID @ TC IDM PD @TC = 25C = 100C = 25C = 25C Continuous Drain Current, VGS @ 10V (Silicon limited) Continuous Drain Current, V GS @ 10V (See Fig.9) Continuous Drain Current, VGS @ 10V (Package limited) Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Single Pulse Avalanche Energy Tested Value Avalanche Current Repetitive Avalanche Energy Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting Torque, 6-32 or M3 screw
Max.
190 130 75 960 200 1.3 20 510 980 See Fig.12a, 12b, 15, 16 -55 to + 175 300 (1.6mm from case ) 10 lbf*in (1.1N*m)
Units
A
VGS EAS EAS (tested) IAR EAR TJ TSTG
W W/C V mJ A mJ C
Thermal Resistance
Parameter
RJC RCS RJA Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient
Typ.
--- 0.50 ---
Max.
0.75 --- 62
Units
C/W
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1
06/21/04
IRF1503S/LPbF
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
V(BR)DSS
V(BR)DSS/TJ
RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss Coss Coss Coss eff.
Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance
Min. 30 --- --- 2.0 75 --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- ---
Typ. --- 0.028 2.6 --- --- --- --- --- --- 130 36 41 17 130 59 48 5.0 13 5730 2250 290 7580 2290 3420
Max. Units Conditions --- V VGS = 0V, ID = 250A --- V/C Reference to 25C, ID = 1mA 3.3 m VGS = 10V, ID = 140A 4.0 V VDS = 10V, ID = 250A --- S VDS = 25V, ID = 140A 20 VDS = 30V, VGS = 0V A 250 VDS = 24V, VGS = 0V, TJ = 150C 200 VGS = 20V nA -200 VGS = -20V 200 ID = 140A 54 nC VDS = 24V 62 VGS = 10V --- VDD = 15V --- ID = 140A ns --- RG = 2.5 --- VGS = 10V D Between lead, --- 6mm (0.25in.) nH G from package --- and center of die contact S --- VGS = 0V --- pF VDS = 25V --- = 1.0MHz, See Fig. 5 --- VGS = 0V, VDS = 1.0V, = 1.0MHz --- VGS = 0V, VDS = 24V, = 1.0MHz --- VGS = 0V, VDS = 0V to 24V
Source-Drain Ratings and Characteristics
IS
ISM
VSD trr Qrr ton Notes: Repetitive rating; pulse width limited by max. junction temperature. (See fig. 11). Starting TJ = 25C, L = 0.049mH RG = 25, IAS = 140A. (See Figure 12). ISD 140A, di/dt 110A/s, VDD V(BR)DSS, TJ 175C Pulse width 400s; duty cycle 2%.
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time
Min. Typ. Max. Units
Conditions D MOSFET symbol --- --- 190 showing the A G integral reverse --- --- 960 S p-n junction diode. --- --- 1.3 V TJ = 25C, IS = 140A, VGS = 0V --- 71 110 ns TJ = 25C, IF = 140A --- 110 170 nC di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS .
Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive
avalanche performance.
2
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IRF1503S/LPbF
1000
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP
1000
ID, Drain-to-Source Current (A)
100
ID, Drain-to-Source Current (A)
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP
100
4.5V
10
4.5V
20s PULSE WIDTH Tj = 25C
1 0.1 1 10 100 10 0.1 1
20s PULSE WIDTH Tj = 175C
10 100
VDS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
200
T J = 25C T J = 175C
Gfs, Forward Transconductance (S)
T J = 175C 160
ID, Drain-to-Source Current ()
120
100
T J = 25C
80
40 VDS = 25V 20s PULSE WIDTH 0 0 40 80 120 160 200
10 4.0 5.0 6.0
VDS = 25V 20s PULSE WIDTH
7.0 8.0 9.0 10.0
VGS , Gate-to-Source Voltage (V)
ID, Drain-to-Source Current (A)
Fig 3. Typical Transfer Characteristics
Fig 4. Typical Forward Transconductance Vs. Drain Current
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IRF1503S/LPbF
10000 VGS = 0V, f = 1 MHZ C iss = C gs + C gd , C ds SHORTED Crss Coss = Cgd = C + Cgd ds
20 ID= 140A
8000
VGS , Gate-to-Source Voltage (V)
VDS= 24V
16
C, Capacitance (pF)
6000
Ciss
12
4000
8
Coss
2000
4
Crss
0 1 10 100
0 0 40 80 120 160 200 Q G Total Gate Charge (nC)
VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
1000.0
10000 OPERATION IN THIS AREA LIMITED BY RDS(on)
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
100.0 T J = 175C 10.0
1000
100
100sec 1msec
1.0
T J = 25C VGS = 0V 0.0 0.4 0.8 1.2 1.6 2.0
10 Tc = 25C Tj = 175C Single Pulse 1 1 10
10msec
0.1
100
VSD, Source-toDrain Voltage (V)
VDS , Drain-toSource Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRF1503S/LPbF
200
2.0
I D = 240A
LIMITED BY PACKAGE
160
RDS(on) , Drain-to-Source On Resistance
1.5
ID , Drain Current (A)
120
(Normalized)
1.0
80
0.5
40
V GS = 10V
0.0 -60 -40 -20 0 20 40 60 80 100 120 140 160 180
0 25 50 75 100 125 150 175
TC , Case Temperature ( C)
TJ, Junction Temperature
( C)
Fig 9. Maximum Drain Current Vs. Case Temperature
Fig 10. Normalized On-Resistance Vs. Temperature
1
(Z thJC )
D = 0.50
0.20
Thermal Response
0.1
0.10 P DM 0.05 t1 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) t2 Notes: 1. Duty factor D = 2. Peak T t1/ t
2
J = P DM x Z thJC
+T C 1
0.01 0.00001
0.0001
0.001
0.01
0.1
t 1, Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRF1503S/LPbF
EAS , Single Pulse Avalanche Energy (mJ)
15V
1400 1200 1000 800 600 400 200 0 25 50 75 100 125 150 175
VDS
L
DRIVER
RG
20V VGS
D.U.T
IAS tp
+ V - DD
A
0.01
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS tp
Starting T J , Junction Temperature (C)
I AS
Fig 12b. Unclamped Inductive Waveforms
QG
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
10 V
QGS VG QGD
VGS(th) Gate threshold Voltage (V)
4.0
3.0
Charge
ID = 250A
Fig 13a. Basic Gate Charge Waveform
Current Regulator Same Type as D.U.T.
2.0
50K 12V .2F .3F
D.U.T. VGS
3mA
+ V - DS
1.0 -75 -50 -25 0 25 50 75 100 125 150 175 200
T J , Temperature ( C )
IG ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
Fig 14. Threshold Voltage Vs. Temperature
6
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IRF1503S/LPbF
10000
Duty Cycle = Single Pulse
Avalanche Current (A)
1000
0.01
100
0.05 0.10
10
Allowed avalanche Current vs avalanche pulsewidth, tav assuming Tj = 25C due to avalanche losses. Note: In no case should Tj be allowed to exceed Tjmax
1 1.0E-07 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current Vs.Pulsewidth
600
EAR , Avalanche Energy (mJ)
500
TOP Single Pulse BOTTOM 50% Duty Cycle ID = 140A
400
300
200
100
0 25 50 75 100 125 150
Starting T J , Junction Temperature (C)
Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of T jmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 12a, 12b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. I av = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25C in Figure 15, 16). tav = Average time in avalanche. 175 D = Duty cycle in avalanche = tav *f ZthJC(D, tav ) = Transient thermal resistance, see figure 11) PD (ave) = 1/2 ( 1.3*BV*Iav) = DT/ ZthJC Iav = 2DT/ [1.3*BV*Zth] EAS (AR) = PD (ave)*tav
Fig 16. Maximum Avalanche Energy Vs. Temperature
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IRF1503S/LPbF
D.U.T
Driver Gate Drive
+
P.W.
Period
D=
P.W. Period VGS=10V
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
-
-
+
RG
* dv/dt controlled by R G * Driver same type as D.U.T. * I SD controlled by Duty Factor "D" * D.U.T. - Device Under Test
V DD
VDD
+ -
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET(R) Power MOSFETs
RD
V DS V GS RG 10V
Pulse Width 1 s Duty Factor 0.1 %
D.U.T.
+
-V DD
Fig 18a. Switching Time Test Circuit
VDS 90%
10% VGS
td(on) tr t d(off) tf
Fig 18b. Switching Time Waveforms
8
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IRF1503S/LPbF
D2Pak Package Outline
Dimensions are shown in millimeters (inches)
D2Pak Part Marking Information
T HIS IS AN IRF 530S WIT H LOT CODE 8024 ASS E MBL ED ON WW 02, 2000 IN T HE AS S E MBLY L INE "L" Note: "P" in as s embly line pos ition indicates "Lead-F ree" INT E RNAT IONAL RECT IF IE R LOGO AS S EMB LY LOT CODE PART NUMBE R F 530S DAT E CODE YEAR 0 = 2000 WE EK 02 LINE L
OR
INT ERNAT IONAL RE CT IF IER LOGO AS S E MBLY LOT CODE PAR T NUMBER F530S DAT E CODE P = DE S IGNAT ES LEAD-F REE PRODU CT (OPT IONAL) YEAR 0 = 2000 WEEK 02 A = AS S EMBLY S ITE CODE
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IRF1503S/LPbF
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
TO-262 Part Marking Information
EXAMPLE: THIS IS AN IRL3103L LOT CODE 1789 AS S EMBLED ON WW 19, 1997 IN T HE AS S EMBLY LINE "C" Note: "P" in as sembly line position indicates "Lead-Free" INT ERNAT IONAL RECTIFIER LOGO AS S EMBLY L OT CODE PART NUMBER
DATE CODE YEAR 7 = 1997 WEEK 19 LINE C
OR
INT ERNAT IONAL RE CTIFIER LOGO AS S EMBLY LOT CODE PART NUMBER DAT E CODE P = DE S IGNAT ES L EAD-FREE PRODUCT (OPTIONAL) YEAR 7 = 1997 WEEK 19 A = AS S E MBL Y S IT E CODE
10
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IRF1503S/LPbF
D2Pak Tape & Reel Information
Dimensions are shown in millimeters (inches)
TRR
1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153)
1.60 (.063) 1.50 (.059) 0.368 (.0145) 0.342 (.0135)
FEED DIRECTION 1.85 (.073)
1.65 (.065)
11.60 (.457) 11.40 (.449)
15.42 (.609) 15.22 (.601)
24.30 (.957) 23.90 (.941)
TRL
10.90 (.429) 10.70 (.421) 1.75 (.069) 1.25 (.049) 16.10 (.634) 15.90 (.626) 4.72 (.136) 4.52 (.178)
FEED DIRECTION
13.50 (.532) 12.80 (.504)
27.40 (1.079) 23.90 (.941)
4
330.00 (14.173) MAX.
60.00 (2.362) MIN.
NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
26.40 (1.039) 24.40 (.961) 3
30.40 (1.197) MAX. 4
Data and specifications subject to change without notice. This product has been designed and qualified for Industrial market. Qualification Standards can be found on IR's Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 06/04
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